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Efficient Parallelization of Large-Scale Modular Multiplication via Low-Latency LogJumps
Kirbiyik S., Czuprynko M., Krieger F., Hirner F., Sinha Roy S.
FPL 2026
A Flexible Hardware Design Tool for Fast Fourier and Number-Theoretic Transformation Architectures
Krieger F., Hirner F., Mert A., Sinha Roy S.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 45(5), 2026
High-Performance SIMD Software for Spielman Codes in Zero-Knowledge Proofs
Krieger F., Dobrouschek C., Hirner F., Sinha Roy S.
IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 2026(2), 2026
Privacy at your Fingertips: Enabling Rapid Client-Side Operations in Fully Homomorphic Encryption
Aikata A., Krieger F., Sinha Roy S.
11th IEEE European Symposium on Security and Privacy - EuroS&P 2026
Accelerating Hash-Based Polynomial Commitment Schemes with Linear Prover Time
Hirner F., Krieger F., Piber C., Sinha Roy S.
IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 2025(4), 2025
Exploring Large Integer Multiplication for Cryptography Targeting In-Memory Computing
Krieger F., Hirner F., Sinha Roy S.
2025 Design, Automation and Test in Europe Conference, DATE 2025 - Proceedings
OpenNTT - An Automated Toolchain for Compiling High-Performance NTT Accelerators in FHE
Krieger F., Hirner F., Mert A., Sinha Roy S.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design
Whipping the Multivariate-based MAYO Signature Scheme using Hardware Platforms
Hirner F., Streibl M., Krieger F., Mert A., Sinha Roy S.
CCS 2024 - Proceedings of the 2024 ACM SIGSAC Conference on Computer and Communications Security