Florian Hirner
Dipl.-Ing. BScSecure Systems, PhD Candidate
I’m a PhD Candidate at Graz University of Technology, part of the CryptoEngineering group at ISEC. My research focuses on developing new methodologies to accelerate cryptographic protocols such as Post-Quantum Cryptography (PQC) and Zero-Knowledge Proofs (ZKP) on hardware platforms. I’m also interested in exploring high-performance computing architectures that use FPGA and ASIC platforms with DDR or HBM memory.
Research
Research topics:- Post-quantum signature schemes (MAYO, UOV)
- Zero-Knowlege Proof systems (Groth16, Orion)
- Florian Krieger (2023)
- Michael Streibl (2024)
- Constantin Piber (2024)
Teaching
- Digital System Design (Summer Semester 2024)
- Digital System Design (Summer Semester 2025)
- Algorithms to hardware using High-Level-Synthesis (Summer Semester 2026)
Service
- Artifact Reviewer (TCHES'2026)
- Artifact Reviewer (TCHES'2025)
- Reviewer (TCAD, TETC, ...)
- Subreviewer (TCHES, DAC, DATE, TCAD)
Publications
Chiplet-Based Techniques for Scalable and Memory-Aware Multiscalar Multiplication on Hardware Platforms
Hirner F., Krieger F., Sinha Roy S.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2026
Chiplet-Based Techniques for Scalable and Memory-Aware Multi-Scalar Multiplication on Hardware Platforms
Hirner F., Krieger F., Sinha Roy S.
2026
Efficient Parallelization of Large-Scale Modular Multiplication via Low-Latency LogJumps
Kirbiyik S., Czuprynko M., Krieger F., Hirner F., Sinha Roy S.
FPL 2026
A Flexible Hardware Design Tool for Fast Fourier and Number-Theoretic Transformation Architectures
Krieger F., Hirner F., Mert A., Sinha Roy S.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 45(5), 2026
High-Performance SIMD Software for Spielman Codes in Zero-Knowledge Proofs
Krieger F., Dobrouschek C., Hirner F., Sinha Roy S.
IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 2026(2), 2026