Vedad Hadžić

Vedad Hadžić officially joined IAIK as a PhD Student in December 2019, but was already an active student research collaborator since 2016. In November 2022 he completed his PhD Proposal Defense and became a PhD Candidate. The main focus of his research is the design and formal verification of side-channel resistant implementations in hardware. This puts him right at the crossover between the Secure Systems and Formal Methods groups at IAIK, which led to several inter-group collaborations on formal side-channel analysis, fault-attack analysis and memory-safety formalization.